In a double sample delta-sigma modulator, an integrator output includes a modulated product of a sampled input signal at half the sampling frequency. The modulated product at half the sampling frequency folds the out of band quantization noise of the modulator in-band.
A double sample delta-sigma modulator may include a feedback path having a digital-to-analog converter (DAC), to provide compensation feedback to the sample circuits. Quantization noise in a delta-sigma modulator peaks at half the sampling frequency.
If the DAC output and the input signal samples are applied to a common capacitor, in-band quantization noise folding may degrade signal-to-quantization noise ratio. In addition, deviation from virtual ground at an operation amplifier within the integrator may degrade signal-to-noise ratio.
A double sample delta-sigma modulator may include separate capacitors to receive outputs of the DAC. The separate capacitors, however, increase settling requirements of the operational amplifier.
A double sample delta-sigma modulator may be configured with a “zero” at half the sampling frequency. This, however, may decrease a maximum stable input range, and thus a signal-to-noise ratio of the delta-sigma modulator.
A data weighted averaging (DWA), dynamic element matching (DEM) technique has be utilized in multi-bit delta-sigma data converters to shape distortion spectra from digital-to-analog (DAC) linearity errors, to improve dynamic range.
In the drawings, the leftmost digit(s) of a reference number identifies the drawing in which the reference number first appears.